Coresight - devicetree简介
简介
2023-09-11 14:18:25 时间
文章目录
一、设备树简介
设备树规范（DTSpec，设备树规范主要针对嵌入式系统，）定义了一个被称作设备树（DT）的结构来描述系统硬件，因此设备树是一种描述硬件的数据结构。引导程序将设备树加载到客户程序的内存中并将指向该设备树的指针传递给客户程序。
设备树（DT）是一个由节点构成的树状数据结构，节点用于描述系统中的设备。每个节点通过属性/值对来描述其所表示的设备的特性。除了根节点没有父节点外，其他所有节点有且仅有一个父节点。
即：设备树由一系列被命名的节点（Node）和属性（Property）组成，而节点本身可包含子节点。所谓属性，其实就是成对出现的名称和值。
设备树（DT）是易于阅读的硬件描述文件，它采用JSON式的格式化风格，在这种简单的树形结构中，设备表示为带有属性的节点。属性可以是空（只有键，用来描述布尔值），也可以是键值对，其中的值可以包含任意的字节流，每个内核子系统或框架都有自己的DT绑定。
本章主要描述了ARM coresight 子系统的DT绑定。
从概念上来说，一组通用的使用规范（称为设备树绑定），定义了描述一个新设备的典型硬件特性时数据该如何在设备树中展示。对于设备必备属性的全面描述应该通过创建设备树绑定来实现。为了给Linux设备驱动提供关于设备的必要属性，设备树绑定中的属性描述必须充分。在嵌入式系统中，这些属性包括CPU的数量和类别、·内存基地址和大小、数据总线、中断控制器和中断使用情况、GPIO连接、外设等（原先这些信息大多被硬编码在内核中）。应该尽可能通过已有的设备树绑定来描述硬件，以最大化利用现有的支持代码。由于属性和节点名字都是纯文本，可以很容易地通过定义新的节点和属性来新建或者扩展已有的绑定。对于一般的绑定来说，这些绑定由设备树规范来描述，这些规范位于Linux软件组件文档中，例如Linux内核（https://www.kernel.org/doc/Documentation/devicetree/bindings/
二、CoreSight Components
CoreSight组件符合ARM CoreSight体系结构规范，可以以各种拓扑连接，以满足特定SoC跟踪需求。这些跟踪组件通常可以分为 sinks、links 和 sources 。由一个或多个 sources 生成的跟踪数据 将 the source 连接到当前选定的 sink 流经的中间 links 。每个CoreSight组件设备都应该使用这些属性来描述其硬件特性。
1.1 Required properties
除了不可配置的 replicators 和不可配置的 funnels 外，所有组件的必需属性：
compatible：当驱动程序使用AMBA总线接口时，必须使用“arm，primecell”来补充这些功能。可能的值包括：
- Embedded Trace Buffer (version 1.0):
"arm,coresight-etb10", "arm,primecell";
- Trace Port Interface Unit:
"arm,coresight-tpiu", "arm,primecell";
- Trace Memory Controller, used for Embedded Trace Buffer(ETB),
Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR)
configuration. The configuration mode (ETB, ETF, ETR) is
discovered at boot time when the device is probed.
"arm,coresight-tmc", "arm,primecell";
- Trace Programmable Funnel:
"arm,coresight-dynamic-funnel", "arm,primecell";
"arm,coresight-funnel", "arm,primecell"; (OBSOLETE. For
backward compatibility and will be removed)
- Embedded Trace Macrocell (version 3.x) and
Program Flow Trace Macrocell:
"arm,coresight-etm3x", "arm,primecell";
- Embedded Trace Macrocell (version 4.x), with memory mapped access.
"arm,coresight-etm4x", "arm,primecell";
- Embedded Trace Macrocell (version 4.x), with system register access only.
"arm,coresight-etm4x-sysreg";
- Coresight programmable Replicator :
"arm,coresight-dynamic-replicator", "arm,primecell";
- System Trace Macrocell:
"arm,coresight-stm", "arm,primecell"; [1]
- Coresight Address Translation Unit (CATU)
"arm,coresight-catu", "arm,primecell";
- Coresight Cross Trigger Interface (CTI):
"arm,coresight-cti", "arm,primecell";
See coresight-cti.yaml for full CTI definitions.
reg：组件的寄存器集的物理基地址和长度。
clocks：与此组件关联的时钟。
clock-names：代码引用的时钟的名称。由于我们使用的是AMBA框架，因此提供互连的时钟的名称应该是“apb_pclk”，一些CoreSight块还具有额外的时钟“atclk”，它为该CoreSight组件的核心提供时钟。后一个时钟是可选的。
port or ports：请参阅下面的 “Graph bindings for Coresight” 。
嵌入式跟踪宏单元（3.x版和4.x版）的其他必需属性：
cpu：此ETM/PTM关联到的CPU phandle。如果省略，不要假定它默认为CPU0。
系统跟踪宏单元(STM)的其他必需属性：
reg：除了如上所述的寄存器组的物理基址和长度之外，还需要另一个条目来描述扩展 stimulus 端口区域的映射。
reg-names：唯一可接受的值是 “stm-base” 和 “stm-stimulus-base” ，每个值对应于“reg”中定义的区域。
CoreSight交叉触发接口(CTI)的必需属性：
有关完整的CTI定义，请参阅coresight-cti.yaml（Documentation/devicetree/bindings/arm/coresight-cti.yaml）。
未出现在AMBA总线上的设备的必需属性，例如不可配置的 replicators 和不可配置的 funnels ：
compatible：当前支持的值为（注意没有AMBA标记）：
- Coresight Non-configurable Replicator:
"arm,coresight-static-replicator";
"arm,coresight-replicator"; (OBSOLETE. For backward
compatibility and will be removed)
- Coresight Non-configurable Funnel:
"arm,coresight-static-funnel";
port or ports：请参阅下面的 “Graph bindings for Coresight” 。
1.2 Optional properties
所有组件的可选属性：
arm,coresight-loses-context-with-cpu：boolean. 表示硬件将在 CPU power down 时丢失寄存器上下文(例如CPUIdle)。可能需要这样做的一个例子是在同一电源域中包含CoreSight组件和CPU的系统。当 CPU power down 时，CoreSight组件也会断电并丢失其上下文。此属性当前仅用于ETM 4.x驱动程序。
ETM/PTM的可选属性：
arm,cp14：如果系统通过协处理器14访问ETM/PTM管理寄存器，则必须存在。
qcom,skip-power-up：boolean. 指示实现可以跳过打开跟踪单元的电源。TRCPDCR.PU不必在QUALCOMM Technologies Inc.系统上设置，因为ETM与其CPU核心位于相同的功率域中。当设置TRCPDCR.PU时，需要此属性来标识具有硬件勘误表的此类系统，其中CPU监视程序计数器停止。
TMC（Trace Memory Controller）的可选属性：
arm,buffer-size：TMC ETR(嵌入式跟踪路由器)的连续缓冲区空间大小。此属性已过时。缓冲区大小可以通过sysfs中的 buffer_size 属性动态配置。
arm,scatter-gather：boolean. 表示TMC-ETR可以在此系统上安全地使用SG模式。
CATU的可选属性：
interrupts：仅列出一个SPI用于报告地址错误。
可配置 replicators 的可选属性：
qcom,replicator-loses-context：boolean. 表示当移除AMBA时钟时，replicators 将丢失寄存器上下文，这在某些 replicators 设计中可以观察到。
1.2 replicators 和 funnels
static的replicators 和 funnels是不可配置的。
（1）arm,coresight-dynamic-funnel.yaml
The Coresight funnel merges 2-8 trace sources into a single trace
stream with programmable enable and priority of input ports.
examples:
- |
funnel@20040000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x20040000 0x1000>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
out-ports {
port {
funnel_out_port0: endpoint {
remote-endpoint = <&replicator_in_port0>;
};
};
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
funnel_in_port0: endpoint {
remote-endpoint = <&ptm0_out_port>;
};
};
port@1 {
reg = <1>;
funnel_in_port1: endpoint {
remote-endpoint = <&ptm1_out_port>;
};
};
port@2 {
reg = <2>;
funnel_in_port2: endpoint {
remote-endpoint = <&etm0_out_port>;
};
};
};
};
（2）arm,coresight-static-funnel.yaml
The Coresight static funnel merges 2-8 trace sources into a single trace stream.
examples:
- |
funnel {
/*
* non-configurable replicators don't show up on the
* AMBA bus. As such no need to add "arm,primecell".
*/
compatible = "arm,coresight-static-funnel";
out-ports {
port {
combo_funnel_out: endpoint {
remote-endpoint = <&top_funnel_in>;
};
};
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
combo_funnel_in0: endpoint {
remote-endpoint = <&cluster0_etf_out>;
};
};
port@1 {
reg = <1>;
combo_funnel_in1: endpoint {
remote-endpoint = <&cluster1_etf_out>;
};
};
};
};
（3）arm,coresight-dynamic-replicator.yaml
The Coresight replicator splits a single trace stream into two trace streams
for systems that have more than one trace sink component.
examples:
- |
replicator@20120000 {
compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
reg = <0x20120000 0x1000>;
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
port@1 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&etr_in_port>;
};
};
};
in-ports {
port {
replicator_in_port0: endpoint {
remote-endpoint = <&csys2_funnel_out_port>;
};
};
};
};
（4）arm,coresight-static-replicator.yaml
The Coresight replicator splits a single trace stream into two trace streams
for systems that have more than one trace sink component.
examples:
- |
replicator {
/*
* non-configurable replicators don't show up on the
* AMBA bus. As such no need to add "arm,primecell".
*/
compatible = "arm,coresight-static-replicator";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&etb_in_port>;
};
};
port@1 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
};
in-ports {
port {
replicator_in_port0: endpoint {
remote-endpoint = <&funnel_out_port0>;
};
};
};
};
三、Graph bindings for Coresight
CoreSight组件相互连接以创建一条数据路径，用于将从 “sources” 生成的跟踪数据流传输到它们的收集点 “sink” 。每个CoreSight组件都必须描述 “input” 和 “output” 连接。连接必须通过通用DT（设备树）图绑定来描述，如 “bindings/graph.txt” 所述，其中每个 “port” 和一个 “endpoint” 组件代表一个硬件端口和连接。
*所有输出端口必须列在名为“out-ports”的子节点内
*所有输入端口必须列在名为“in-ports”的子节点内。
*端口地址必须与硬件端口号匹配。
Example：
1. Sinks
etb@20010000 {
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0 0x20010000 0 0x1000>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
in-ports {
port {
etb_in_port: endpoint@0 {
remote-endpoint = <&replicator_out_port0>;
};
};
};
};
tpiu@20030000 {
compatible = "arm,coresight-tpiu", "arm,primecell";
reg = <0 0x20030000 0 0x1000>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
in-ports {
port {
tpiu_in_port: endpoint@0 {
remote-endpoint = <&replicator_out_port1>;
};
};
};
};
etr@20070000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0 0x20070000 0 0x1000>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
in-ports {
port {
etr_in_port: endpoint {
remote-endpoint = <&replicator2_out_port0>;
};
};
};
out-ports {
port {
etr_out_port: endpoint {
remote-endpoint = <&catu_in_port>;
};
};
};
};
2. Links
replicator {
/* non-configurable replicators don't show up on the
* AMBA bus. As such no need to add "arm,primecell".
*/
compatible = "arm,coresight-static-replicator";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&etb_in_port>;
};
};
port@1 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
};
in-ports {
port {
replicator_in_port0: endpoint {
remote-endpoint = <&funnel_out_port0>;
};
};
};
};
funnel {
/*
* non-configurable funnel don't show up on the AMBA
* bus. As such no need to add "arm,primecell".
*/
compatible = "arm,coresight-static-funnel";
clocks = <&crg_ctrl HI3660_PCLK>;
clock-names = "apb_pclk";
out-ports {
port {
combo_funnel_out: endpoint {
remote-endpoint = <&top_funnel_in>;
};
};
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
combo_funnel_in0: endpoint {
remote-endpoint = <&cluster0_etf_out>;
};
};
port@1 {
reg = <1>;
combo_funnel_in1: endpoint {
remote-endpoint = <&cluster1_etf_out>;
};
};
};
};
funnel@20040000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x20040000 0 0x1000>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
out-ports {
port {
funnel_out_port0: endpoint {
remote-endpoint =
<&replicator_in_port0>;
};
};
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
funnel_in_port0: endpoint {
remote-endpoint = <&ptm0_out_port>;
};
};
port@1 {
reg = <1>;
funnel_in_port1: endpoint {
remote-endpoint = <&ptm1_out_port>;
};
};
port@2 {
reg = <2>;
funnel_in_port2: endpoint {
remote-endpoint = <&etm0_out_port>;
};
};
};
};
3. Sources
ptm@2201c000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2201c000 0 0x1000>;
cpu = <&cpu0>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
out-ports {
port {
ptm0_out_port: endpoint {
remote-endpoint = <&funnel_in_port0>;
};
};
};
};
ptm@2201d000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2201d000 0 0x1000>;
cpu = <&cpu1>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
out-ports {
port {
ptm1_out_port: endpoint {
remote-endpoint = <&funnel_in_port1>;
};
};
};
};
4. STM
stm@20100000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0 0x20100000 0 0x1000>,
<0 0x28000000 0 0x180000>;
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&soc_smc50mhz>;
clock-names = "apb_pclk";
out-ports {
port {
stm_out_port: endpoint {
remote-endpoint = <&main_funnel_in_port2>;
};
};
};
};
5. CATU
catu@207e0000 {
compatible = "arm,coresight-catu", "arm,primecell";
reg = <0 0x207e0000 0 0x1000>;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
in-ports {
port {
catu_in_port: endpoint {
remote-endpoint = <&etr_out_port>;
};
};
};
};
又比如高通：https://elixir.bootlin.com/linux/latest/source/arch/arm64/boot/dts/qcom/msm8916.dtsi
soc: soc@0 {
......
stm: stm@802000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x00802000 0x1000>,
<0x09280000 0x180000>;
reg-names = "stm-base", "stm-stimulus-base";
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
out-ports {
port {
stm_out: endpoint {
remote-endpoint = <&funnel0_in7>;
};
};
};
};
/* System CTIs */
/* CTI 0 - TMC connections */
cti0: cti@810000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x00810000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
status = "disabled";
};
/* CTI 1 - TPIU connections */
cti1: cti@811000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x00811000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
status = "disabled";
};
/* CTIs 2-11 - no information - not instantiated */
tpiu: tpiu@820000 {
compatible = "arm,coresight-tpiu", "arm,primecell";
reg = <0x00820000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
port {
tpiu_in: endpoint {
remote-endpoint = <&replicator_out1>;
};
};
};
};
funnel0: funnel@821000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x00821000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
/*
* Not described input ports:
* 0 - connected to Resource and Power Manger CPU ETM
* 1 - not-connected
* 2 - connected to Modem CPU ETM
* 3 - not-connected
* 5 - not-connected
* 6 - connected trought funnel to Wireless CPU ETM
* 7 - connected to STM component
*/
port@4 {
reg = <4>;
funnel0_in4: endpoint {
remote-endpoint = <&funnel1_out>;
};
};
port@7 {
reg = <7>;
funnel0_in7: endpoint {
remote-endpoint = <&stm_out>;
};
};
};
out-ports {
port {
funnel0_out: endpoint {
remote-endpoint = <&etf_in>;
};
};
};
};
replicator: replicator@824000 {
compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
reg = <0x00824000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
out-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
replicator_out0: endpoint {
remote-endpoint = <&etr_in>;
};
};
port@1 {
reg = <1>;
replicator_out1: endpoint {
remote-endpoint = <&tpiu_in>;
};
};
};
in-ports {
port {
replicator_in: endpoint {
remote-endpoint = <&etf_out>;
};
};
};
};
etf: etf@825000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x00825000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
port {
etf_in: endpoint {
remote-endpoint = <&funnel0_out>;
};
};
};
out-ports {
port {
etf_out: endpoint {
remote-endpoint = <&replicator_in>;
};
};
};
};
etr: etr@826000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x00826000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
port {
etr_in: endpoint {
remote-endpoint = <&replicator_out0>;
};
};
};
};
funnel1: funnel@841000 { /* APSS funnel only 4 inputs are used */
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x00841000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
status = "disabled";
in-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
funnel1_in0: endpoint {
remote-endpoint = <&etm0_out>;
};
};
port@1 {
reg = <1>;
funnel1_in1: endpoint {
remote-endpoint = <&etm1_out>;
};
};
port@2 {
reg = <2>;
funnel1_in2: endpoint {
remote-endpoint = <&etm2_out>;
};
};
port@3 {
reg = <3>;
funnel1_in3: endpoint {
remote-endpoint = <&etm3_out>;
};
};
};
out-ports {
port {
funnel1_out: endpoint {
remote-endpoint = <&funnel0_in4>;
};
};
};
};
debug0: debug@850000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0x00850000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU0>;
status = "disabled";
};
debug1: debug@852000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0x00852000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU1>;
status = "disabled";
};
debug2: debug@854000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0x00854000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU2>;
status = "disabled";
};
debug3: debug@856000 {
compatible = "arm,coresight-cpu-debug", "arm,primecell";
reg = <0x00856000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU3>;
status = "disabled";
};
/* Core CTIs; CTIs 12-15 */
/* CTI - CPU-0 */
cti12: cti@858000 {
compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
"arm,primecell";
reg = <0x00858000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU0>;
arm,cs-dev-assoc = <&etm0>;
status = "disabled";
};
/* CTI - CPU-1 */
cti13: cti@859000 {
compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
"arm,primecell";
reg = <0x00859000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU1>;
arm,cs-dev-assoc = <&etm1>;
status = "disabled";
};
/* CTI - CPU-2 */
cti14: cti@85a000 {
compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
"arm,primecell";
reg = <0x0085a000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU2>;
arm,cs-dev-assoc = <&etm2>;
status = "disabled";
};
/* CTI - CPU-3 */
cti15: cti@85b000 {
compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
"arm,primecell";
reg = <0x0085b000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>;
clock-names = "apb_pclk";
cpu = <&CPU3>;
arm,cs-dev-assoc = <&etm3>;
status = "disabled";
};
etm0: etm@85c000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x0085c000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU0>;
status = "disabled";
out-ports {
port {
etm0_out: endpoint {
remote-endpoint = <&funnel1_in0>;
};
};
};
};
etm1: etm@85d000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x0085d000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU1>;
status = "disabled";
out-ports {
port {
etm1_out: endpoint {
remote-endpoint = <&funnel1_in1>;
};
};
};
};
etm2: etm@85e000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x0085e000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU2>;
status = "disabled";
out-ports {
port {
etm2_out: endpoint {
remote-endpoint = <&funnel1_in2>;
};
};
};
};
etm3: etm@85f000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x0085f000 0x1000>;
clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
clock-names = "apb_pclk", "atclk";
arm,coresight-loses-context-with-cpu;
cpu = <&CPU3>;
status = "disabled";
out-ports {
port {
etm3_out: endpoint {
remote-endpoint = <&funnel1_in3>;
};
};
};
};
......
}
root@linaro-alip:~# cat /sys/firmware/devicetree/base/soc/
#address-cells interconnect@580000/
audio-codec@771c000/ interrupt-controller@b000000/
audio-controller@7708000/ iommu@1ef0000/
camss@1b00000/ iommu@1f08000/
cci@1b0c000/ mailbox@b011000/
clock@b016000/ mdss@1a00000/
clock-controller@1800000/ name
compatible pinctrl@1000000/
cti@810000/ qfprom@5c000/
cti@811000/ ranges
cti@858000/ remoteproc@4080000/
cti@859000/ remoteproc@a21b000/
cti@85a000/ replicator@824000/
cti@85b000/ restart@4ab000/
debug@850000/ rng@22000/
debug@852000/ sdhci@7824000/
debug@854000/ sdhci@7864000/
debug@856000/ serial@78af000/
dma-controller@7884000/ serial@78b0000/
etf@825000/ #size-cells
etm@85c000/ sound@7702000/
etm@85d000/ spi@78b5000/
etm@85e000/ spi@78b6000/
etm@85f000/ spi@78b7000/
etr@826000/ spi@78b8000/
funnel@821000/ spi@78b9000/
funnel@841000/ spi@78ba000/
gpu@1c00000/ spmi@200f000/
hwlock@1905000/ sram@60000/
i2c@78b5000/ stm@802000/
i2c@78b6000/ syscon@1937000/
i2c@78b7000/ thermal-sensor@4a9000/
i2c@78b8000/ timer@b020000/
i2c@78b9000/ tpiu@820000/
i2c@78ba000/ usb@78d9000/
interconnect@400000/ video-codec@1d00000/
interconnect@500000/
参考资料
Documentation/devicetree/bindings/arm/coresight.txt
https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/arm
相关文章
- [转] Immutable 常用API简介
- Redis 简介
- 数据全景洞察概念简介
- HDF及HDF-EOS数据格式简介
- Zope简介
- Zookeeper Client简介
- HiSpark系列开发套件简介
- 《Hadoop MapReduce实战手册》一2.1 简介
- Intel x86_64 PMU简介
- 《R与Hadoop大数据分析实战》一2.2 Hadoop MapReduce技术简介
- 《PostgreSQL服务器编程》一一第1章 PostgreSQL服务器简介
- 【深度学习实验报告】实验 1：PyTorch 使用简介
- 【正点原子FPGA连载】第二十六章gpio子系统简介 摘自【正点原子】DFZU2EG_4EV MPSoC之嵌入式Linux开发指南
- C语言 关键字简介